Commits · 6b81cccb3a6c5b01ea0ceb5dd18b0e71dc71b147 · Roberto Hexsel / cMIPS

29 Mar, 2017 1 commit
- added test to RGB lets to mac_7seg.s, assorted small fixes · 6b81cccb
  Roberto Hexsel authored Mar 29, 2017
  
  6b81cccb
28 Mar, 2017 1 commit
- added program that turns the board into a clock · c9400bea
  Roberto Hexsel authored Mar 28, 2017
  
  c9400bea
25 Mar, 2017 1 commit
- improved driver to LCD display and sundry small fixes · 1ad34d5e
  Roberto Hexsel authored Mar 25, 2017
  
  1ad34d5e
08 Mar, 2017 1 commit
- improved instructions to build and install mips-gcc · 3e7cf10d
  Roberto Hexsel authored Mar 08, 2017
  
  3e7cf10d
14 Oct, 2016 3 commits
- core.vhd missing in CAUSE always updated -- except if STATUS.EXL=1 · b27d20fe
  Roberto Hexsel authored Oct 14, 2016
  
  b27d20fe
- CAUSE always updated -- except if STATUS.EXL=1 · c6c42ec6
  Roberto Hexsel authored Oct 14, 2016
  
  c6c42ec6
- fixed PageTable allocation in mid-ram · ff455188
  Roberto Hexsel authored Oct 13, 2016
  
  ff455188
17 Aug, 2016 1 commit
- new gtkwave configuration files with min,Medium,MAX detail · f0fe6e47
  Roberto Hexsel authored Aug 17, 2016
  
  f0fe6e47
23 Jun, 2016 5 commits
- stopCount missing in handlers.s · 2aab8110
  Roberto Hexsel authored Jun 23, 2016
  
  2aab8110
- fix to count.expected · ed8eb887
  Roberto Hexsel authored Jun 23, 2016
  
  ed8eb887
- small fixes · b3ac909c
  Roberto Hexsel authored Jun 22, 2016
  
  b3ac909c
- added functions to stop COUNT · 26b1c705
  Roberto Hexsel authored Jun 22, 2016
  
  26b1c705
- added functions to start/stop/read COUNT and test to ensure COUNT counts · b613259d
  Roberto Hexsel authored Jun 22, 2016
  
  b613259d
16 May, 2016 1 commit
- ll-sc test file missing · 5ca9543a
  Roberto Hexsel authored May 16, 2016
  
  5ca9543a
15 May, 2016 1 commit
- SC-nop-branch forwarding was fixed, with thanks to Rafael Soares · 2d5cf5ec
  Roberto Hexsel authored May 14, 2016
  
  2d5cf5ec
13 May, 2016 1 commit
- handlers turned EXL=0 too early accepting interrupts from within selves · 15af2070
  Roberto Hexsel authored May 13, 2016
  
  15af2070
10 May, 2016 2 commits
- fixed data allocation for UART_rx_irq handler · 9782bdeb
  Roberto Hexsel authored May 10, 2016
  
  9782bdeb
- improved UART_rx_irq handler · c67b6164
  Roberto Hexsel authored May 10, 2016
  
  c67b6164
09 May, 2016 1 commit
- handler for TLBload e TLBstore · 0def435e
  Roberto Hexsel authored May 08, 2016
  
  0def435e
08 May, 2016 1 commit
- handler for TLBmodified · 7fb756c2
  Roberto Hexsel authored May 08, 2016
  
  7fb756c2
06 May, 2016 2 commits
- new uart_irx.expected · 23de04fe
  Roberto Hexsel authored May 06, 2016
  
  23de04fe
- page table walk, several fixes · 791396a2
  Roberto Hexsel authored May 06, 2016
  
  791396a2
22 Apr, 2016 1 commit
- hw interrupts were connected to the wront IRQs · e21ec516
  Roberto Hexsel authored Apr 22, 2016
  
  e21ec516
13 Apr, 2016 2 commits
- fixed handlers.s · 92800b1d
  Roberto Hexsel authored Apr 13, 2016
  
  92800b1d
- fixed yesterday-s incomplete update · fc3b9232
  Roberto Hexsel authored Apr 13, 2016
  
  fc3b9232
12 Apr, 2016 1 commit
- added sdram address decoding · f053542d
  Roberto Hexsel authored Apr 12, 2016
  
  f053542d
11 Apr, 2016 1 commit
- moved IO addresses to include SDRAM · de9f9e78
  Roberto Hexsel authored Apr 11, 2016
  
  de9f9e78
10 Apr, 2016 1 commit
- small syntax problem in rom,vhd · fbafc894
  Roberto Hexsel authored Apr 10, 2016
  
  fbafc894
08 Apr, 2016 2 commits
- forward progress holds with simultaneous interrupts · b80a0478
  Roberto Hexsel authored Apr 08, 2016
  
  b80a0478
- remote UART now activated by RTS · bdff9da6
  Roberto Hexsel authored Apr 08, 2016
  
  bdff9da6
07 Apr, 2016 2 commits
- removed all fake entities · 8cb5a972
  Roberto Hexsel authored Apr 07, 2016
  
  8cb5a972
- added fake_SDRAM_controller · 64d9cccb
  Roberto Hexsel authored Apr 07, 2016
  
  64d9cccb
05 Apr, 2016 1 commit
- SDRAM controller's state machine written · 2c424a99
  Roberto Hexsel authored Apr 05, 2016
  
  2c424a99
01 Apr, 2016 1 commit
- incomplete SDRAM controller · eea4da3a
  Roberto Hexsel authored Apr 01, 2016
  
  eea4da3a
22 Mar, 2016 1 commit
- added tests for interrupt on JR delay slot · 254f4bbb
  Roberto Hexsel authored Mar 22, 2016
  
  254f4bbb
15 Mar, 2016 1 commit
- interrupt on a J/BR delay slot, with JR stalled, loaded the wrong EPC (thnx Vanessa) · c6cd4046
  Roberto Hexsel authored Mar 15, 2016
  
  c6cd4046
24 Feb, 2016 1 commit
- increased ROM and RAM sizes · f449ae9a
  Roberto Hexsel authored Feb 24, 2016
  
  f449ae9a
14 Dec, 2015 3 commits
- Merge branch 'master' of gitlab.c3sl.ufpr.br:roberto/cmips · 6b2b5608
  Roberto Hexsel authored Dec 14, 2015
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two commits without a push
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  6b2b5608
- added test for lw ra; jr ra (with files) · 7cc43c6e
  Roberto Hexsel authored Dec 14, 2015
  
  7cc43c6e
- added test for lw ra; jr ra · 71218814
  Roberto Hexsel authored Dec 14, 2015
  
  71218814