Commit 58596646 authored by Roberto Hexsel's avatar Roberto Hexsel

2nd attempt: new baud rates for UART

parent 7d7f7d03
......@@ -27,8 +27,7 @@
-- 010: 1/16 CPU clock rate -- for VHDL/C debugging only
-- 011: 1/32 CPU clock rate -- for VHDL/C debugging only
-- 100: 230.400 baud
-- 100: 115.200 baud
-- 101: 57.600 baud
-- 101: 115.200 baud
-- 110: 19.200 baud
-- 111: 9.600 baus
-- b3=1: signal interrupt on RX buffer full, when a new octet is available
......@@ -570,7 +569,6 @@ begin
32/2 when b"011",
217/2 when b"100", -- 230.400
434/2 when b"101", -- 115.200
868/2 when b"110", -- 57.600
2604/2 when b"110", -- 19.200
5208/2 when others; -- 9.600
......@@ -579,8 +577,7 @@ begin
-- 010: 1/16 CPU clock rate -- for VHDL/C debugging only
-- 011: 1/32 CPU clock rate -- for VHDL/C debugging only
-- 100: 230.400 baud
-- 100: 115.200 baud
-- 101: 57.600 baud
-- 101: 115.200 baud
-- 110: 19.200 baud
-- 111: 9.600 baus
......@@ -621,7 +618,6 @@ begin
32/2 when b"011",
217/2 when b"100", -- 230.400
434/2 when b"101", -- 115.200
868/2 when b"110", -- 57.600
2604/2 when b"110", -- 19.200
5208/2 when others; -- 9.600
......@@ -1064,7 +1060,6 @@ begin
32/2 when b"011",
217/2 when b"100", -- 230.400
434/2 when b"101", -- 115.200
868/2 when b"110", -- 57.600
2604/2 when b"110", -- 19.200
5208/2 when others; -- 9.600
......@@ -1093,7 +1088,6 @@ begin
32/2 when b"011",
217/2 when b"100", -- 230.400
434/2 when b"101", -- 115.200
868/2 when b"110", -- 57.600
2604/2 when b"110", -- 19.200
5208/2 when others; -- 9.600
......
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